USBHS_HSTICR

Host Global Interrupt Clear Register

This register always reads as zero.

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Clears the corresponding bit in USBHS_HSTISR.

  0x0408 32 Write-only    
Parent topic: Register Summary

Host Global Interrupt Clear Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
    HWUPIC HSOFIC RXRSMIC RSMEDIC RSTIC DDISCIC DCONNIC  
Access                   
Reset                   

Bit 0 – DCONNIC: Device Connection Interrupt Clear

Device Connection Interrupt Clear

Bit 1 – DDISCIC: Device Disconnection Interrupt Clear

Device Disconnection Interrupt Clear

Bit 2 – RSTIC: USB Reset Sent Interrupt Clear

USB Reset Sent Interrupt Clear

Bit 3 – RSMEDIC: Downstream Resume Sent Interrupt Clear

Downstream Resume Sent Interrupt Clear

Bit 4 – RXRSMIC: Upstream Resume Received Interrupt Clear

Upstream Resume Received Interrupt Clear

Bit 5 – HSOFIC: Host Start of Frame Interrupt Clear

Host Start of Frame Interrupt Clear

Bit 6 – HWUPIC: Host Wakeup Interrupt Clear

Host Wakeup Interrupt Clear