Data Receive with the DMA in Master Mode

The DMA transfer size must be defined with the buffer size minus 2. The two remaining characters must be managed without DMA to ensure that the exact number of bytes are received regardless of system bus latency conditions encountered during the end of buffer transfer period.

  1. 1.Initialize the DMA (channels, memory pointers, size - 2, etc.);
  2. 2.Configure the Master mode (DADR, CKDIV, MREAD = 1, etc.) or Slave mode.
  3. 3.Enable the DMA.
  4. 4.(Master Only) Write TWIHS_CR.START to start the transfer.
  5. 5.Wait for the DMA status flag indicating that the buffer transfer is complete.
  6. 6.Disable the DMA.
  7. 7.Wait for the RXRDY flag in the TWIHS_SR.
  8. 8.Set TWIHS_CR.STOP.
  9. 9.Read the penultimate character in TWIHS_RHR.
  10. 10.Wait for the RXRDY flag in the TWIHS_SR.
  11. 11.Read the last character in TWIHS_RHR.
  12. 12.(Only if peripheral clock must be disabled) Wait for the TXCOMP flag to be raised in TWIHS_SR.
Parent topic: Using the DMA Controller (DMAC) in Master Mode