The SUPC controls the embedded voltage regulator.
The voltage regulator automatically adapts its quiescent current depending on the required load current. Refer to the section “Electrical Characteristics”.
The user can switch off the voltage regulator, and thus put the device in Backup mode, by writing a ‘1’ to SUPC_CR.VROFF.
This asserts the vddcore_nreset signal after the write resynchronization time, which lasts two slow clock cycles (worst case). Once the vddcore_nreset signal is asserted, the processor and the peripherals are stopped one slow clock cycle before the core power supply shuts off.
When the internal voltage regulator is not used and VDDCORE is supplied by an external supply, the voltage regulator can be disabled by writing a ‘0’ to SUPC_MR.ONREG.