USBHS_HSTIDR

Host Global Interrupt Disable Register

This register always reads as zero.

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Clears the corresponding bit in USBHS_HSTIMR.

  0x0414 32 Write-only    

Host Global Interrupt Disable Register

Bit  31 30 29 28 27 26 25 24  
  DMA_6 DMA_5 DMA_4 DMA_3 DMA_2 DMA_1 DMA_0    
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
              PEP_9 PEP_8  
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
  PEP_7 PEP_6 PEP_5 PEP_4 PEP_3 PEP_2 PEP_1 PEP_0  
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
    HWUPIEC HSOFIEC RXRSMIEC RSMEDIEC RSTIEC DDISCIEC DCONNIEC  
Access                   
Reset                   

Bit 0 – DCONNIEC: Device Connection Interrupt Disable

Device Connection Interrupt Disable

Bit 1 – DDISCIEC: Device Disconnection Interrupt Disable

Device Disconnection Interrupt Disable

Bit 2 – RSTIEC: USB Reset Sent Interrupt Disable

USB Reset Sent Interrupt Disable

Bit 3 – RSMEDIEC: Downstream Resume Sent Interrupt Disable

Downstream Resume Sent Interrupt Disable

Bit 4 – RXRSMIEC: Upstream Resume Received Interrupt Disable

Upstream Resume Received Interrupt Disable

Bit 5 – HSOFIEC: Host Start of Frame Interrupt Disable

Host Start of Frame Interrupt Disable

Bit 6 – HWUPIEC: Host Wakeup Interrupt Disable

Host Wakeup Interrupt Disable

Bits 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 – PEP_: Pipe x Interrupt Disable

Pipe x Interrupt Disable

Bits 25, 26, 27, 28, 29, 30, 31 – DMA_: DMA Channel x Interrupt Disable

DMA Channel x Interrupt Disable