USART Interrupt Disable Register (LIN_MODE)
This configuration is relevant only if USART_MODE = 0xA or 0xB in the USART Mode Register.
The following configuration values are valid for all listed bit names of this register:
0: No effect
1: Disables the corresponding interrupt.
Interrupt Disable
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
LINHTE | LINSTE | LINSNRE | LINCE | LINIPE | LINISFE | LINBE | |||
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
LINTC | LINID | LINBK | TXEMPTY | TIMEOUT | |||||
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PARE | FRAME | OVRE | TXRDY | RXRDY | |||||
Access | |||||||||
Reset |
RXRDY Interrupt Disable
TXRDY Interrupt Disable
Overrun Error Interrupt Disable
Framing Error Interrupt Disable
Parity Error Interrupt Disable
Timeout Interrupt Disable
TXEMPTY Interrupt Disable
LIN Break Sent or LIN Break Received
LIN Identifier Sent or LIN Identifier Received Interrupt Disable
LIN Transfer Completed Interrupt Disable
LIN Bus Error Interrupt Disable
LIN Inconsistent Synch Field Error Interrupt Disable
LIN Identifier Parity Interrupt Disable
LIN Checksum Error Interrupt Disable
LIN Slave Not Responding Error Interrupt Disable
LIN Synch Tolerance Error Interrupt Disable
LIN Header Timeout Error Interrupt Disable