GMAC_EC

GMAC Excessive Collisions Register

  0x140 32 Read-only 0x00000000  

GMAC Excessive Collisions Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
              XCOL[9:8]  
Access              R R  
Reset              0 0  
Bit  7 6 5 4 3 2 1 0  
  XCOL[7:0]  
Access  R R R R R R R R  
Reset  0 0 0 0 0 0 0 0  

Bits 9:0 – XCOL[9:0]: Excessive Collisions

Excessive Collisions

This register counts the number of frames that failed to be transmitted because they experienced 16 collisions.