The internal functional blocks of the MLB include:
- MediaLB Block (MLB PHY) - Implements the physical and link-layer requirements of a MediaLB 3-pin interface. Serial-to-parallel and parallel-to-serial data transformations are implemented, as well as MediaLB frame synchronization.
- Host Bus Interface Block (HBI) - Provides 16-bit parallel slave access to all MOST channels and data types for the external Host Controller (HC). The HBI supports up to 64 independent channels with a minimum access latency of 40 ns per word and a maximum bandwidth of 400 Mbps.
- Routing Fabric Block (RF) - Manages the flow of data between the MediaLB block and the HBI block, implementing a bus arbiter and multiplexing logic to the Channel Table RAM (CTR) and the Data Buffer RAM (DBR).
- Memory Interface Block (MIF) - Implements a bridge between the I/O bus and the customer-implemented RAMs (i.e. Channel Table and Data Buffer).
- Interrupt Interface Block (INTIF) - Sends notifications to HBI that there are changes to the channel descriptors.
- Clocks, Power, and Reset Block (CPR) - Implements clock and reset multiplexing and synchronization.
- AHB Block (AHB) - Implements a bus bridge between the AHB master and the HBI slave interfaces.
- APB Block (APB) - Implements a bus bridge that translates the two-cycle APB interface signals to the single-cycle I/O interface signals.