The Read mode is defined as a data requirement from the master.
After a START or a REPEATED START condition is detected, the decoding of the address starts. If the slave address (SADR) is decoded, SVACC is set and SVREAD indicates the direction of the transfer.
Until a STOP or REPEATED START condition is detected, the TWIHS continues sending data loaded in TWIHS_THR.
If a STOP condition or a REPEATED START + an address different from SADR is detected, SVACC is reset.
The figure below describes the read operation.
Figure 1. Read Access Ordered by a Master
Notes:
- 1.When SVACC is low, the state of SVREAD becomes irrelevant.
- 2.TXRDY is reset when data has been transmitted from TWIHS_THR to the internal shifter and set when this data has been acknowledged or non acknowledged.