UART_IER

UART Interrupt Enable Register

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Enables the corresponding interrupt.

  0x08 32 Write-only –  
Parent topic: Register Summary

UART Interrupt Enable Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
  CMP           TXEMPTY    
Access  W           W    
Reset  –           –    
Bit  7 6 5 4 3 2 1 0  
  PARE FRAME OVRE       TXRDY RXRDY  
Access  W W W       W W  
Reset  – – –       – –  

Bit 0 – RXRDY: Enable RXRDY Interrupt

Enable RXRDY Interrupt

Bit 1 – TXRDY: Enable TXRDY Interrupt

Enable TXRDY Interrupt

Bit 5 – OVRE: Enable Overrun Error Interrupt

Enable Overrun Error Interrupt

Bit 6 – FRAME: Enable Framing Error Interrupt

Enable Framing Error Interrupt

Bit 7 – PARE: Enable Parity Error Interrupt

Enable Parity Error Interrupt

Bit 9 – TXEMPTY: Enable TXEMPTY Interrupt

Enable TXEMPTY Interrupt

Bit 15 – CMP: Enable Comparison Interrupt

Enable Comparison Interrupt