Analog Front-End Conversion

The AFE embeds programmable gain amplifiers that must be enabled prior to any conversion. The bits PGA0EN and PGA1EN in the Analog Control register (AFEC_ACR) must be set.

The AFE uses the AFE clock to perform conversions. In order to guarantee a conversion with minimum error, after any start of conversion, the AFEC waits a number of AFE clock cycles (called transfer time) before changing the channel selection again (and so starts a new tracking operation).

AFE conversions are sequenced by two operating times: the tracking time and the conversion time.

The AFE clock frequency is selected in the PRESCAL field of the AFEC_MR. The tracking phase starts during the conversion of the previous channel. If the tracking time is longer than the conversion time of the12-bit AD converter (tCONV), the tracking phase is extended to the end of the previous conversion.

The AFE clock frequency ranges from fperipheral clock/2 if PRESCAL is 1, and fperipheral clock/256 if PRESCAL is set to 255 (0xFF). PRESCAL must be programmed to provide the AFE clock frequency given in the section “Electrical Characteristics”.

The AFE conversion time (tAFE_conv) is applicable for all modes and is calculated as follows:

tAFE_conv=23×tAFE Clock

When the averager is activated, the AFE conversion time is multiplied by the OSR value.

In Free Run mode, the sampling frequency (fS) is calculated as 1/tAFE_conv.

Figure 1. Sequence of AFE Conversions when Tracking Time > Conversion Time
Figure 2. Sequence of AFE Conversions when Tracking Time < Conversion Time