QSPI_SKR

QSPI Scrambling Key Register

This register can only be written if bit WPEN is cleared in the QSPI Write Protection Mode Register.

  0x44 32 Write-only –  
Parent topic: Register Summary

QSPI Scrambling Key Register

Bit  31 30 29 28 27 26 25 24  
  USRK[31:24]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  USRK[23:16]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  USRK[15:8]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  USRK[7:0]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 –  

Bits 31:0 – USRK[31:0]: User Scrambling Key

User Scrambling Key