DACC_CDRx

DACC Conversion Data Register

  0x1C + x*0x04 [x=0..1] 32 Write-only –   2 -1
Parent topic: Register Summary

DACC Conversion Data Register

Bit  31 30 29 28 27 26 25 24  
  DATA1[15:8]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  DATA1[7:0]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 –  
Bit  15 14 13 12 11 10 9 8  
  DATA0[15:8]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  DATA0[7:0]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 –  

Bits 15:0 – DATA0[15:0]: Data to Convert for channel x

Data to Convert for channel x

DATA0 is written to the FIFO of channel x.

Bits 31:16 – DATA1[15:0]: Data to Convert for channel x

Data to Convert for channel x

If DACC_MR.WORD is set, DATA1 is written to the FIFO of channel x after DATA0.