RTT_AR

Real-time Timer Alarm Register

The alarm interrupt must be disabled (ALMIEN must be cleared in RTT_MR) when writing a new ALMV value.
  0x04 32 Read/Write 0xFFFFFFFF  

Real-time Timer Alarm Register

Bit  31 30 29 28 27 26 25 24  
  ALMV[31:24]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  
Bit  23 22 21 20 19 18 17 16  
  ALMV[23:16]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  
Bit  15 14 13 12 11 10 9 8  
  ALMV[15:8]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  
Bit  7 6 5 4 3 2 1 0  
  ALMV[7:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  1 1 1 1 1 1 1 1  

Bits 31:0 – ALMV[31:0]: Alarm Value

Alarm Value

When the CRTV value in RTT_VR equals the ALMV field, the ALMS flag is set in RTT_SR. As soon as the ALMS flag rises, the CRTV value equals ALMV+1 (refer to the figure RTT Counting above).