Host Pipe x Error Register
Writing a zero in a bit/field in this register clears the bit/field. Writing a one has no effect.
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| COUNTER[1:0] | CRC16 | TIMEOUT | PID | DATAPID | DATATGL | ||||
| Access | |||||||||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Data Toggle Error
| Value | Description |
|---|---|
| 0 | No Data Toggle error occurred since last clear of this bit. |
| 1 | This bit is automatically set when a Data Toggle error has been detected. |
Data PID Error
| Value | Description |
|---|---|
| 0 | No Data PID error occurred since last clear of this bit. |
| 1 | This bit is automatically set when a Data PID error has been detected. |
PID Error
| Value | Description |
|---|---|
| 0 | No PID error occurred since last clear of this bit. |
| 1 | This bit is automatically set when a PID error has been detected. |
Time-Out Error
| Value | Description |
|---|---|
| 0 | No Time-Out error occurred since last clear of this bit. |
| 1 | This bit is automatically set when a Time-Out error has been detected. |
CRC16 Error
| Value | Description |
|---|---|
| 0 | No CRC16 error occurred since last clear of this bit. |
| 1 | This bit is automatically set when a CRC16 error has been detected. |
Error Counter
This field is incremented each time an error occurs (CRC16, TIMEOUT, PID, DATAPID or DATATGL).
This field is cleared when receiving a USB packet free of error.
When this field reaches 3 (i.e., 3 consecutive errors), this pipe is automatically frozen (USBHS_HSTPIPIMRx.PFREEZE is set).