PMC_SCDR

PMC System Clock Disable Register

This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.

  0x0004 32 Write-only    

PMC System Clock Disable Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
  PCK7 PCK6 PCK5 PCK4 PCK3 PCK2 PCK1 PCK0  
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
      USBCLK            
Access                   
Reset                   

Bit 5 – USBCLK: Disable USB FS Clock

Disable USB FS Clock

ValueDescription
0

No effect.

1

Disables USB FS clock.

Bits 8, 9, 10, 11, 12, 13, 14, 15 – PCK: Programmable Clock x Output Disable

Programmable Clock x Output Disable

ValueDescription
0

No effect.

1

Disables the corresponding Programmable Clock output.