PWM_ELMRx

PWM Event Line x Mode Register

  0x7C + x*0x04 [x=0..1] 32 Read/Write 0x00000000   2 -1
Parent topic: Register Summary

PWM Event Line x Mode Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
  CSEL7 CSEL6 CSEL5 CSEL4 CSEL3 CSEL2 CSEL1 CSEL0  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  

Bits 0, 1, 2, 3, 4, 5, 6, 7 – CSELy: Comparison y Selection

Comparison y Selection

ValueDescription
0

A pulse is not generated on the event line x when the comparison y matches.
1

A pulse is generated on the event line x when the comparison y match.