System I/O lines are pins used by oscillators, Test mode, reset, JTAG and other features. The following table lists the SAM E70/S70/V70/V71 system I/O lines shared with PIO lines.
These pins are software-configurable as general-purpose I/Os or system pins. At startup, the default function of these pins is always used.
CCFG_SYSIO Bit Number |
Default Function After Reset | Other Function | Constraints for Normal Start | Configuration |
---|---|---|---|---|
12 | ERASE | PB12 | Low Level at startup (see Note 1) | In Matrix User Interface
Registers (Refer to the CCFG_SYSIO register) |
7 | TCK/SWCLK | PB7 | – | |
6 | TMS/SWDIO | PB6 | – | |
5 | TDO/TRACESWO | PB5 | – | |
4 | TDI | PB4 | – | |
– | PA7 | XIN32 | – | (see Note 2) |
– | PA8 | XOUT32 | – | |
– | PB9 | XIN | – | (see Note 3) |
– | PB8 | XOUT | – |