AES_IDATARx

AES Input Data Register x

  0x40 + x*0x04 [x=0..3] 32 Write-only –   4 -1
Parent topic: Register Summary

AES Input Data Register x

Bit  31 30 29 28 27 26 25 24  
  IDATA[31:24]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  IDATA[23:16]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  IDATA[15:8]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  IDATA[7:0]  
Access  W W W W W W W W  
Reset  0 0 0 0 0 0 0 –  

Bits 31:0 – IDATA[31:0]: Input Data Word

Input Data Word

The four 32-bit Input Data registers set the 128-bit data block used for encryption/decryption.

AES_IDATAR0 corresponds to the first word of the data to be encrypted/decrypted, and AES_IDATAR3 to the last one.

These registers are write-only to prevent the input data from being read by another application.