MCAN_TXESC

MCAN Tx Buffer Element Size Configuration

This register can only be written if the bits CCE and INIT are set in MCAN CC Control Register.

Configures the number of data bytes belonging to a Tx Buffer element. Data field sizes > 8 bytes are intended for CAN FD operation only.

In case the data length code DLC of a Tx Buffer element is configured to a value higher than the Tx Buffer data field size MCAN_TXESC.TBDS, the bytes not defined by the Tx Buffer are transmitted as “0xCC” (padding bytes).

  0xC8 32 Read/Write 0x00000000  

MCAN Tx Buffer Element Size Configuration

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
                   
Access                   
Reset                   
Bit  7 6 5 4 3 2 1 0  
            TBDS[2:0]  
Access            R/W R/W R/W  
Reset            0 0 0  

Bits 2:0 – TBDS[2:0]: Tx Buffer Data Field Size

Tx Buffer Data Field Size

ValueNameDescription
0 8_BYTE

8-byte data field

1 12_BYTE

12-byte data field

2 16_BYTE

16-byte data field

3 20_BYTE

20-byte data field

4 24_BYTE

24-byte data field

5 32_BYTE

32-byte data field

6 48_BYTE

48- byte data field

7 64_BYTE

64-byte data field