MCAN_TXBCF

MCAN Transmit Buffer Cancellation Finished

  0xDC 32 Read-only 0x00000000  
Parent topic: Register Summary

MCAN Transmit Buffer Cancellation Finished

Bit  31 30 29 28 27 26 25 24  
  CF31 CF30 CF29 CF28 CF27 CF26 CF25 CF24  
Access  R R R R R R R R  
Reset  0 0 0 0 0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  CF23 CF22 CF21 CF20 CF19 CF18 CF17 CF16  
Access  R R R R R R R R  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
  CF15 CF14 CF13 CF12 CF11 CF10 CF9 CF8  
Access  R R R R R R R R  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
  CF7 CF6 CF5 CF4 CF3 CF2 CF1 CF0  
Access  R R R R R R R R  
Reset  0 0 0 0 0 0 0 0  

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – CFx: Cancellation Finished for Transmit Buffer x

Cancellation Finished for Transmit Buffer x

Each Transmit Buffer has its own Cancellation Finished bit. The bits are set when the corresponding MCAN_TXBRP bit is cleared after a cancellation was requested via MCAN_TXBCR. In case the corresponding MCAN_TXBRP bit was not set at the point of cancellation, CF is set immediately. The bits are reset when a new transmission is requested by writing a ‘1’ to the corresponding bit of register MCAN_TXBAR.

ValueDescription
0

No transmit buffer cancellation.
1

Transmit buffer cancellation finished.