The Two-wire Interface (TWIHS) interconnects components on a unique two-wire bus, made up of one clock line and one data line with speeds of up to 400 kbit/s in Fast mode and up to 3.4 Mbit/s in High-speed slave mode only, based on a byte-oriented transfer format. It can be used with any Two-wire Interface bus Serial EEPROM and I²C-compatible devices, such as a Real-Time Clock (RTC), Dot Matrix/Graphic LCD Controller and temperature sensor. The TWIHS is programmable as a master or a slave with sequential or single-byte access. Multiple master capability is supported.
A configurable baud rate generator permits the output data rate to be adapted to a wide range of core clock frequencies.
The table below lists the compatibility level of the Two-wire Interface in Master mode and a full I2C compatible device.
| I2C Standard | TWI |
|---|---|
| Standard Mode Speed (100 kHz) | Supported |
| Fast Mode Speed (400 kHz) | Supported |
| High-speed Mode (Slave only, 3.4 MHz) | Supported |
| 7- or 10-bit(1) Slave Addressing | Supported |
| START Byte(2) | Not Supported |
| Repeated Start (Sr) Condition | Supported |
| ACK and NACK Management | Supported |
| Input Filtering | Supported |
| Slope Control | Not Supported |
| Clock Stretching | Supported |
| Multi Master Capability | Supported |