QSPI_WPSR

QSPI Write Protection Status Register

  0xE8 32 Read-only 0x00000000  

QSPI Write Protection Status Register

Bit  31 30 29 28 27 26 25 24  
                   
Access                   
Reset                   
Bit  23 22 21 20 19 18 17 16  
                   
Access                   
Reset                   
Bit  15 14 13 12 11 10 9 8  
  WPVSRC[7:0]  
Access  R R R R R R R R  
Reset  0 0 0 0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
                WPVS  
Access                R  
Reset                0  

Bit 0 – WPVS: Write Protection Violation Status

Write Protection Violation Status

ValueDescription
0

No write protection violation has occurred since the last read of the QSPI_WPSR.

1

A write protection violation has occurred since the last read of the QSPI_WPSR. If this violation is an unauthorized attempt to write a protected register, the associated violation is reported into field WPVSRC.

Bits 15:8 – WPVSRC[7:0]: Write Protection Violation Source

Write Protection Violation Source

When WPVS = 1, WPVSRC indicates the register address offset at which a write access has been attempted.