SAM E70/S70/V70/V71 devices embed 512 Kbytes, 1024 Kbytes, or 2084 Kbytes of internal Flash mapped at address 0x40 0000.
The devices feature a Quad SPI (QSPI) interface, mapped at address 0x80000000, that extends the Flash size by adding an external SPI or QSPI Flash.
When accessed by the Cortex-M7 processor for programming operations, the QSPI and internal Flash address spaces must be defined in the Cortex-M7 memory protection unit (MPU) with the attribute 'Device' or 'Strongly Ordered'. For fetch or read operations, the attribute ‘Normal memory’ must be set to benefit from the internal cache. For additional information, refer to the ARM Cortex-M7 Technical Reference Manual (ARM DDI 0489), which is available for download at www.arm.com.
Some precautions must be taken when the accesses are performed by the central DMA. Refer to the Enhanced Embedded Flash Controller (EEFC) and Quad Serial Peripheral Interface (QSPI).