Fail-Safe Operation

When the external clock fails, the FSCM overwrites the NOSC/COSC bits to select the HFINTOSC, and sets the Oscillator Fail Interrupt Flag (OSFIF) bit of the PIR registers. If the Oscillator Fail Interrupt Enable (OSFIE) bit is set, an interrupt will be generated when OSFIF is set. The frequency of HFINTOSC depends on the previous state of the FRQ bits and the NDIV/CDIV bits.

Once a failure is detected, software can take steps to mitigate the effects of a failed oscillator. The system clock will continue to be sourced from the HFINTOSC until the external oscillator is restarted. Once the external source is operational, software can switch back to the external oscillator via the NOSC/NDIV bits.