PMD0

PMD0

PMD Control Register 0

Note:

1.Clearing the SYSCMD bit disables the system clock (F_OSC) to peripherals, however peripherals clocked by F_OSC/4 are not affected.

Name:: PMD0
Offset:: 0x010C
Reset:
Access:

Bit7	6	5	4	3	2	1	0
TMR0MD	CLKRMD	IOCMD	ACTMD	SYSCMD	SCANMD	CRCMD	NVMMD
AccessR/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset0	0	0	0	0	0	0	0

Bit 7 – TMR0MD: Disable TMR0

Disable TMR0

Value	Description
1	TMR0 module disabled
0	TMR0 module enabled

Bit 6 – CLKRMD: Disable Clock Reference

Disable Clock Reference

Value	Description
1	Clock reference module disabled
0	Clock reference module enabled

Bit 5 – IOCMD: Disable Interrupt-on-Change

Disable Interrupt-on-Change

Value	Description
1	Interrupt-on-change module is disabled
0	Interrupt-on-change module is enabled

Bit 4 – ACTMD: Disable Active Clock Tuning

Disable Active Clock Tuning

Value	Description
1	ACT module disabled
0	ACT module enabled

Bit 3 – SYSCMD: Disable Peripheral System Clock Network(1)

Disable Peripheral System Clock Network⁽¹⁾

Value	Description
1	System clock network disabled (F_OSC)
0	System clock network enabled

Bit 2 – SCANMD: Disable NVM Memory Scanner

Disable NVM Memory Scanner

Value	Description
1	NVM memory scanner module disabled
0	NVM memory scanner module enabled

Bit 1 – CRCMD: Disable CRC Module

Disable CRC Module

Value	Description
1	CRC module disabled
0	CRC module enabled

Bit 0 – NVMMD: Disable NVM access

Disable NVM access

Value	Description
1	All memory reading and writing is disabled; NVMCON registers cannot be written
0	All memory reading and writing is enabled