PIE0

Peripheral Interrupt Enable Register 0
Notes:
  1. 1.The External Interrupt INT pin is selected by INTPPS.
  2. 2.Bit PEIE in the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1 through PIE6. Interrupt sources controlled by the PIE0 register do not require the PEIE bit to be set to allow interrupt vectoring (when the GIE bit in the INTCON register is set).
Name:
PIE0
Offset:
0x0096
Reset:
Access:
Bit76543210
TMR0IEIOCIEINTE
AccessR/WR/WR/W
Reset000

Bit 5 – TMR0IE: Timer0 Interrupt Enable

Timer0 Interrupt Enable

ValueDescription
1 TMR0 interrupts are enabled
0 TMR0 interrupts are disabled

Bit 4 – IOCIE: Interrupt-on-Change Enable

Interrupt-on-Change Enable

ValueDescription
1 IOC interrupts are enabled
0 IOC interrupts are disabled

Bit 0 – INTE: External Interrupt Enable(1)

External Interrupt Enable(1)

ValueDescription
1 External interrupts are enabled
0 External interrupts are disabled