TxCLK

Timer Clock Source Selection Register
Name:
TxCLK
Offset:
0x0311,0x0317
Reset:
Access:
Bit76543210
CS[4:0]
AccessR/WR/WR/WR/WR/W
Reset00000

Bits 4:0 – CS[4:0]: Timer Clock Source Selection

Timer Clock Source Selection

Table 1. Timer Clock Sources
CS Clock Source
Timer1 Timer3
11111-10010 Reserved
10001 CLC4_OUT
10000 CLC3_OUT
01111 CLC2_OUT
01110 CLC1_OUT
01101 TMR3_overflow_OUT Reserved
01100 Reserved TMR1_overflow_OUT
01011 TMR0_overflow_OUT
01010 CLKR
01001 EXTOSC
01000 SOSC
00111 MFINTOSC (32 kHz)
00110 MFINTOSC (500 kHz)
00101 SFINTOSC (1 MHz)
00100 LFINTOSC
00011 HFINTOSC
00010 FOSC
00001 FOSC/4
00000 Pin selected by T1CKIPPS Pin selected by T3CKIPPS