Register Summary - ADC

Offset Name Bit Pos. 7 6 5 4 3 2 1 0

0x00

...

0x1D0B

Reserved                  
0x1D0C ADLTH 7:0 LTH[7:0]
15:8 LTH[15:8]
0x1D0E ADUTH 7:0 UTH[7:0]
15:8 UTH[15:8]
0x1D10 ADERR 7:0 ERR[7:0]
15:8 ERR[15:8]
0x1D12 ADSTPT 7:0 STPT[7:0]
15:8 STPT[15:8]
0x1D14 ADFLTR 7:0 FLTR[7:0]
15:8 FLTR[15:8]
0x1D16 ADACC 7:0 ACC[7:0]
15:8 ACC[15:8]
23:16             ACC[17:16]
0x1D19 ADCNT 7:0 CNT[7:0]
0x1D1A ADRPT 7:0 RPT[7:0]
0x1D1B ADPREV 7:0 PREV[7:0]
15:8 PREV[15:8]
0x1D1D ADRES 7:0 RES[7:0]
15:8 RES[15:8]
0x1D1F ADPCH 7:0     PCH[5:0]
0x1D20 ADNCH 7:0     NCH[5:0]
0x1D21 ADACQ 7:0 ACQ[7:0]
15:8       ACQ[12:8]
0x1D23 ADCAP 7:0       CAP[4:0]
0x1D24 ADPRE 7:0 PRE[7:0]
15:8       PRE[12:8]
0x1D26 ADCON0 7:0 ON CONT   CS FM[1:0] IC GO
0x1D27 ADCON1 7:0 PPOL IPEN GPOL       PCSC DSEN
0x1D28 ADCON2 7:0 PSIS CRS[2:0] ACLR MD[2:0]
0x1D29 ADCON3 7:0   CALC[2:0] SOI TMD[2:0]
0x1D2A ADSTAT 7:0 AOV UTHR LTHR MATH   STAT[2:0]
0x1D2B ADREF 7:0             PREF[1:0]
0x1D2C ADACT 7:0       ACT[4:0]
0x1D2D ADCLK 7:0     CS[5:0]
0x1D2E ADCG1A 7:0     CGA5 CGA4   CGA2 CGA1 CGA0
0x1D2F ADCG1B 7:0 CGB7 CGB6 CGB5 CGB4        
0x1D30 ADCG1C 7:0 CGC7 CGC6 CGC5 CGC4 CGC3 CGC2 CGC1 CGC0