Note: ADC Clock divider is only available if FOSC is selected as the ADC clock source (CS = 0).
Name:
Offset:
0x1D2D
Reset:
Access:
 Bit7 6 5 4 3 2 1 0 CS[5:0] Access R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0