Oscillator Status and Manual Enable

The Oscillator Status (OSCSTAT) register displays the Ready status for each of the following oscillators: The OSCSTAT register also displays the Ready status for the 4xPLL.

The HFINTOSC Oscillator Ready (HFOR), MFINTOSC Oscillator Ready (MFOR), LFINTOSC Oscillator Ready (LFOR), ADCRC Oscillator Ready (ADOR) and SFINTOSC Oscillator Ready (SFOR) Status bits indicate whether the respective oscillators are ready for use. These clock sources are available for use at any time, but may require a finite amount of time before they have reached the specified accuracy levels. When the oscillators are ready and have achieved the specified accuracy, module hardware sets the respective bits.

When a new value is loaded into the OSCFRQ register, the HFOR bit is cleared by hardware, and will be set again once the HFINTOSC is ready. During pending OSCFRQ changes, the HFINTOSC will stall at either a high or a low state until the oscillator locks in the new frequency and resumes operation.

The External Oscillator Ready (EXTOR) and SOSC Oscillator Ready (SOR) Status bits indicate whether the respective external clock sources are ready for use. The external clock sources use the Oscillator Start-up Timer (OST) to determine when the oscillator is ready. Once the OST has expired, the external oscillator is ready for use, and module hardware sets the respective bits.

The Oscillator Enable (OSCEN) register can be used to manually enable the following oscillators:
Important: OSCEN cannot be used to manually enable the 4xPLL.