The effect of the decoupling capacitors can be visualized through the power integrity simulations. The target impedance of the VDD is calculated as 40 mΩ, based on the following values:

The following figure shows the impedance profile of the VDD plane of the SmartFusion2 Development Kit. It shows that the capacitors used are adequate to improve the impedance profile over the bandwidth. Good coupling between the planes can be achieved by having power and ground plane in adjacent layers. Once all the capacitors (0.1 μF and 0.01 μF) are placed, the impedance of the VDD plane impedance profile improves over the frequency range. The simulation results shown in this document are done in Sigrity PowerSI tool. For more information on simulation, see the Sigrity PowerSI Tutorial.

Figure 1. Impedance Profile of VDD Plane with Respect to Frequency