The following figure illustrates the typical power supply requirements for SmartFusion2/IGLOO2 devices. For more information about decoupling capacitors associated with individual power supplies, see Table 1.
For M2S090T(S), M2GL090T(S), M2S150T(S), and M2GL150T(S) devices, the VPP and VPPNVM must be connected to a 3.3 V supply.
For the CCC_xyz_PLL supplies, xy refers to the location of the PLL in the device (NE/ NW/ SW) and z refers to the number associated with the PLL (0 or 1).
The PLL RC values shown in the figure are applicable to all variants of SmartFusion2/IGLOO2 devices.
When the power rails are in use, see Figure 1. For unused cases, see Figure 1. The power supply needed for IGLOO2 and SmartFusion2 FPGAs is Core VDD (Fabric voltage). Serdes_VDD is tied to VDD internally, hence the same regulator should be used to drive SERDES_x_VDD, SERDES_x_Lyz_VDDAIO, and Core VDD together.
For the device-package combinations listed in the following table, the SERDES_x_VDD pins are shorted with VDD pins inside the package substrate to free up the package pins.
Device | Package |
---|---|
M2S025T, M2GL025T | FCS325 |
M2S050T(S), M2GL050T(S) | FCS325 |
M2S060T(S), M2GL060T(S) | FCS325 |
M2S90T(S), M2GL90T(S) | FCS325 |
M2S10T(S), M2GL010T(S) | VF256 |
M2S025TS, M2S025T, M2GL025TS, M2GL025T | VF256 |
M2S150T(S), M2GL150T(S) | FCV484 |
M2S150TS, M2S150T M2GL150TS, M2GL150T | FCS536 |
For detailed pin descriptions, see DS0115: SmartFusion2 Pin Descriptions Datasheet or DS0124: IGLOO2 Pin Descriptions Datasheet.