The connections of 1.2 kΩ resistor and SERDES_1_L01_REXT of SmartFusion2/IGLOO2 must not be routed as a thick plane. It must be routed as a signal trace to meet minimum capacitance requirement of the SERDES_1_L01_REXT pin. The length of the trace should be short. The following figure shows the sample layout.
Same layout guidelines should be followed for the remaining SerDes PLL power supplies.