In the serial peripheral interface (SPI) driver, a callback function can be registered in the driver by the application and triggered when the transfer done. It provides an interface to read/write the data from/to the slave device.
Refer SPI Drivers for more detailed SPI basics.
Initialize and deinitialize the driver and associated hardware
Register I/O descriptor
Enable or disable SPI master
Hookup callback handlers on read/write/transfer complete, or error events
Read/Write message to/from the slave
Select character size
Set SPI baudrate
Which clock source is used
After the SPI hardware initialization, the spi_m_async_get_io_descriptor function is needed to register an I/O descriptor. Then use spi_m_async_register_callback to register a callback function for the RX/TX/transfer, and enable the SPI hardware. After that, control the slave select (SS) pin and start the read/write operation.
The slave select (SS) is not automatically inserted during read/write/transfer, user must use I/O to control the devices' SS.
While read/write/transfer is in progress, the data buffer used must be kept unchanged.
The following shows a simple example of using the SPI master. The SPI master must have been initialized by spi_m_async_init. This initialization will configure the operation of the SPI master.
The example registers an I/O descriptor and enables the hardware. Then it registers a callback, and finally starts a writing operation.
/**
* Example of using SPI_0 to write "Hello World" using the I/O abstraction.
* Since the driver is asynchronous we need to use statically allocated memory for string
* because driver initiates transfer and then returns before the transmission is completed.
* Once transfer has been completed the tx_cb function will be called.
*/
static uint8_t example_SPI_0[12] = "Hello World!";
static uint8_t flag = false;
static void complete_cb_SPI_0(const struct spi_m_async_descriptor *const io_descr)
{
/* Transfer completed */
flag = true;
}
void SPI_0_example(void)
{
struct io_descriptor *io;
spi_m_async_get_io_descriptor(&SPI_0, &io);
spi_m_async_register_callback(&SPI_0, SPI_M_ASYNC_CB_XFER, (FUNC_PTR)complete_cb_SPI_0);
spi_m_async_enable(&SPI_0);
/* Control the slave select (SS) pin */
//gpio_set_pin_level(SPI_0_SS, false);
io_write(io, example_SPI_0, 12);
while (!flag) {
}
flag = false;
/* Control the slave select (SS) pin */
//gpio_set_pin_level(SPI_0_SS, true);
}
The SPI master peripheral and its related I/O lines and clocks
The NVIC must be configured so that SPI interrupt requests are periodically serviced