The I/O memory map is laid out so that all registers for a given peripheral module are placed in one continuous memory block. Registers belonging to different modules are not mixed up, where the registers macros are defined as below:
#define LATA LATA
extern volatile unsigned char LATA __at(0xF82);
#define LATB LATB
extern volatile unsigned char LATB __at(0xF83);
#define LATC LATC
extern volatile unsigned char LATC __at(0xF84);