Main Clock

The SLCD bus clock (CLK_SLCD_APB) must be enabled to access the registers and it can be configured in the Main Clock module MCLK,

A 32.768kHz oscillator clock (CLK_SLCD_OSC) is required to clock the SLCD. This clock must be configured and enabled in the 32KHz oscillator controller (OSC32KCTRL) before using the SLCD.