Reset Controller

The latest reset cause is available in RCAUSE, and can be read during the application boot sequence in order to determine proper action.

There are two groups of reset sources:

The table below lists the parts of the device that are reset, depending on the reset type.

Table 1. Effects of the Different Reset Events
  Power Reset User Reset
  POR, BOD12, BOD33 External Reset WDT Reset, SysResetReq
RTC
All the 32kHz sources
WDT with ALWAYSON feature
Generic Clock with WRTLOCK feature Y N N
Debug logic Y Y N
Others Y Y Y

The external reset is generated when pulling the RESET pin low. This pin has an internal pull-up, and does not need to be driven externally during normal operation.

The POR, BOD12 and BOD33 reset sources are generated by their corresponding module in the System Controller Interface (SYSCTRL).

The WDT reset is generated by the Watchdog Timer.

The System Reset Request (SysResetReq) is a software reset generated by the CPU when asserting the SYSRESETREQ bit located in the Reset Control register of the CPU (See the ARM® Cortex® Technical Reference Manual on http://www.arm.com).

Figure 1. Reset Controller