STATUS

Status

  0x7 8 – 0x00  

Status

Bit  7 6 5 4 3 2 1 0  
  SYNCBUSY                
Access  R                
Reset  0                

Bit 7 – SYNCBUSY: Synchronization Busy

Synchronization Busy

This bit is cleared when the synchronization of registers between clock domains is complete.

This bit is set when the synchronization of registers between clock domains is started.