DFLLCTRL

DFLL48M Control

  0x24 16 Write-Protected, Write-Synchronized 0x0080  
Parent topic: Register Description

DFLL48M Control

Bit  15 14 13 12 11 10 9 8  
              QLDIS CCDIS  
Access              R/W R/W  
Reset              0 0  
Bit  7 6 5 4 3 2 1 0  
  ONDEMAND     LLAW STABLE MODE ENABLE    
Access  R/W     R/W R/W R/W R/W    
Reset  1     0 0 0 0    

Bit 9 – QLDIS: Quick Lock Disable

Quick Lock Disable

ValueDescription
0 Quick Lock is enabled.
1 Quick Lock is disabled.

Bit 8 – CCDIS: Chill Cycle Disable

Chill Cycle Disable

ValueDescription
0 Chill Cycle is enabled.
1 Chill Cycle is disabled.

Bit 7 – ONDEMAND: On Demand Control

On Demand Control

The On Demand operation mode allows an oscillator to be enabled or disabled depending on peripheral clock requests.

In On Demand operation mode, i.e., if the ONDEMAND bit has been previously written to one, the oscillator will only be running when requested by a peripheral. If there is no peripheral requesting the oscillator s clock source, the oscillator will be in a disabled state.

If On Demand is disabled the oscillator will always be running when enabled.

In standby sleep mode, the On Demand operation is still active if the DFLLCTRL.RUNSTDBY bit is one. If DFLLCTRL.RUNSTDBY is zero, the oscillator is disabled.

ValueDescription
0 The oscillator is always on, if enabled.
1 The oscillator is enabled when a peripheral is requesting the oscillator to be used as a clock source. The oscillator is disabled if no peripheral is requesting the clock source.

Bit 4 – LLAW: Lose Lock After Wake

Lose Lock After Wake

ValueDescription
0 Locks will not be lost after waking up from sleep modes if the DFLL clock has been stopped.
1 Locks will be lost after waking up from sleep modes if the DFLL clock has been stopped.

Bit 3 – STABLE: Stable DFLL Frequency

Stable DFLL Frequency

ValueDescription
0 FINE calibration tracks changes in output frequency.
1 FINE calibration register value will be fixed after a fine lock.

Bit 2 – MODE: Operating Mode Selection

Operating Mode Selection

ValueDescription
0 The DFLL operates in open-loop operation.
1 The DFLL operates in closed-loop operation.

Bit 1 – ENABLE: DFLL Enable

DFLL Enable

Due to synchronization, there is delay from updating the register until the peripheral is enabled/disabled. The value written to DFLLCTRL.ENABLE will read back immediately after written.

ValueDescription
0 The DFLL oscillator is disabled.
1 The DFLL oscillator is enabled.