INPUTCTRL

Input Control

  0x10 32 Write-Protected, Write-Synchronized 0x00000000  

Input Control

Bit  31 30 29 28 27 26 25 24  
          GAIN[3:0]  
Access          R/W R/W R/W R/W  
Reset          0 0 0 0  
Bit  23 22 21 20 19 18 17 16  
  INPUTOFFSET[3:0] INPUTSCAN[3:0]  
Access  R/W R/W R/W R/W R/W R/W R/W R/W  
Reset  0 0 0 0 0 0 0 0  
Bit  15 14 13 12 11 10 9 8  
        MUXNEG[4:0]  
Access        R/W R/W R/W R/W R/W  
Reset        0 0 0 0 0  
Bit  7 6 5 4 3 2 1 0  
        MUXPOS[4:0]  
Access        R/W R/W R/W R/W R/W  
Reset        0 0 0 0 0  

Bits 27:24 – GAIN[3:0]: Gain Factor Selection

Gain Factor Selection

These bits set the gain factor of the ADC gain stage.

GAIN[3:0] Name Description
0x0 1X 1x
0x1 2X 2x
0x2 4X 4x
0x3 8X 8x
0x4 16X 16x
0x5-0xE - Reserved
0xF DIV2 1/2x

Bits 23:20 – INPUTOFFSET[3:0]: Positive Mux Setting Offset

Positive Mux Setting Offset

The pin scan is enabled when INPUTSCAN != 0. Writing these bits to a value other than zero causes the first conversion triggered to be converted using a positive input equal to MUXPOS + INPUTOFFSET. Setting this register to zero causes the first conversion to use a positive input equal to MUXPOS.

After a conversion, the INPUTOFFSET register will be incremented by one, causing the next conversion to be done with the positive input equal to MUXPOS + INPUTOFFSET. The sum of MUXPOS and INPUTOFFSET gives the input that is actually converted.

Bits 19:16 – INPUTSCAN[3:0]: Number of Input Channels Included in Scan

Number of Input Channels Included in Scan

This register gives the number of input sources included in the pin scan. The number of input sources included is INPUTSCAN + 1. The input channels included are in the range from MUXPOS + INPUTOFFSET to MUXPOS + INPUTOFFSET + INPUTSCAN.

The range of the scan mode must not exceed the number of input channels available on the device.

Bits 12:8 – MUXNEG[4:0]: Negative Mux Input Selection

Negative Mux Input Selection

These bits define the Mux selection for the negative ADC input selections.

ValueNameDescription
0x00 PIN0 ADC AIN0 pin
0x01 PIN1 ADC AIN1 pin
0x02 PIN2 ADC AIN2 pin
0x03 PIN3 ADC AIN3 pin
0x04 PIN4 ADC AIN4 pin
0x05 PIN5 ADC AIN5 pin
0x06 PIN6 ADC AIN6 pin
0x07 PIN7 ADC AIN7 pin
0x08-0x17 - Reserved
0x18 GND Internal ground
0x19 IOGND I/O ground
0x1A-0x1F - Reserved

Bits 4:0 – MUXPOS[4:0]: Positive Mux Input Selection

Positive Mux Input Selection

These bits define the Mux selection for the positive ADC input. The following table shows the possible input selections. If the internal bandgap voltage or temperature sensor input channel is selected, then the Sampling Time Length bit group in the SamplingControl register must be written.

MUXPOS[4:0] Group configuration Description
0x00 PIN0 ADC AIN0 pin
0x01 PIN1 ADC AIN1 pin
0x02 PIN2 ADC AIN2 pin
0x03 PIN3 ADC AIN3 pin
0x04 PIN4 ADC AIN4 pin
0x05 PIN5 ADC AIN5 pin
0x06 PIN6 ADC AIN6 pin
0x07 PIN7 ADC AIN7 pin
0x08 PIN8 ADC AIN8 pin
0x09 PIN9 ADC AIN9 pin
0x0A PIN10 ADC AIN10 pin
0x0B PIN11 ADC AIN11 pin
0x0C PIN12 ADC AIN12 pin
0x0D PIN13 ADC AIN13 pin
0x0E PIN14 ADC AIN14 pin
0x0F PIN15 ADC AIN15 pin
0x10 PIN16 ADC AIN16 pin
0x11 PIN17 ADC AIN17 pin
0x12 PIN18 ADC AIN18 pin
0x13 PIN19 ADC AIN19 pin
0x14-0x17   Reserved
0x18 TEMP Temperature reference
0x19 BANDGAP Bandgap voltage
0x1A SCALEDCOREVCC 1/4 scaled core supply
0x1B SCALEDIOVCC 1/4 scaled I/O supply
0x1C DAC DAC output
0x1D-0x1F   Reserved