| Context | ID | Description/values | Access | Size |
|---|---|---|---|---|
| AVR8_CTXT_CONFIG | AVR8_CONFIG_VARIANT |
AVR8_VARIANT_LOOPBACK AVR8_VARIANT_DW AVR8_VARIANT_MEGAJTAG AVR8_VARIANT_XMEGA AVR8_VARIANT_UPDI AVR8_VARIANT_NONE |
W | 1 byte |
| AVR8_CONFIG_FUNCTION |
AVR8_FUNC_NONE AVR8_FUNC_PROGRAMMING AVR8_FUNC_DEBUGGING |
W | 1 byte | |
| AVR8_CTXT_PHYSICAL | AVR8_PHY_PHYSICAL |
AVR8_PHY_INTF_NONE AVR8_PHY_INTF_JTAG AVR8_PHY_INTF_DW AVR8_PHY_INTF_PDI AVR8_PHY_INTF_PDI_1W |
W | 1 byte |
| AVR8_PHY_JTAG_DAISY |
Devices before << 24 Devices after << 16 IR-bits before << 8 IR-bits after << 0 Note: Daisy chain settings must be written before activating the JTAG physical.
|
RW | 4 bytes | |
| AVR8_PHY_DW_CLK_DIV | debugWIRE clock division factor | W | 1 byte | |
| AVR8_PHY_MEGA_PRG_CLK |
JTAG clock frequency (kHz) for programming megaAVR Note: This frequency is limited by the target silicon itself.
|
W | 2 bytes | |
| AVR8_PHY_MEGA_DBG_CLK |
JTAG clock frequency (kHz) for debugging megaAVR Note: This frequency must be less than a quarter of the active target
clock.
|
W | 2 bytes | |
| AVR8_PHY_XM_JTAG_CLK |
JTAG clock frequency (kHz) for programming and debugging AVR XMEGA Note: This frequency is limited by the target silicon itself.
|
W | 2 bytes | |
| AVR8_PHY_XM_PDI_CLK |
PDI clock frequency (kHz) for programming and debugging AVR XMEGA and AVR devices with UPDI Note: This frequency is limited by the target silicon itself.
|
W | 2 bytes | |
| AVR8_CTXT_DEVICE | See tables below for family specific contexts | W | ||
| AVR8_CTXT_OPTIONS | AVR8_OPT_RUN_TIMERS | Run timers in stopped mode. This option allows
timers to continue to run even when the device has entered stopped mode. This
is especially useful for maintaining PWM output values for example in motor
control applications. Note: Timer interrupts will NOT be serviced until RUN mode
is entered. (Not available in AVR XMEGA.)
|
W | 1 byte |
| AVR8_OPT_DISABLE_DBP | Disables data breaks when resetting. Used internally to prevent variable initialization routines from triggering data breakpoints. | W | 1 byte | |
| AVR8_OPT_ENABLE_IDR | Enables messages from the target core. IDR messages can be sent from some target types by writing to the OCD data register during RUN mode. When this option is enabled, these data values will be routed to USB EVENT messages. | W | 1byte | |
| AVR8_OPT_POLL_INT | Adjusts how often the debugger polls the target's state. Value given as polling interval in ms. Possible values: 1, 5, 10, 20, 50, and 100. | W | 1byte | |
| AVR8_CTXT_SESSION | AVR8_SESS_MAIN_PC (deprecated) | Program counter value [word address] of main() function | W | 4 bytes |
| AVR8_CTXT_TEST | AVR8_TEST_TGT_RUNNING |
Actively polls the targets RUN/STOP state. 0x00 = STOPPED 0x01 = RUNNING |
R | 1 byte |