Pin Configurations and Pinouts

Table 1. Pin Configuration
Pin Name	Function
V_CC	Supply Voltage
GND	Ground
MISO	SPI Client Data Output
MOSI	SPI Client Data Input
PIRQ#	SPI Interrupt Requests
SPI_CLK	SPI Clock Input
SPI_CS#	SPI Chip Select
SPI_RST#	SPI Reset Pin

Figure 1. 8-Pad UDFN Pinout Diagram

Table 2. Pin Descriptions
Pin	Pin Type	Description
V_CC	Power	Power Supply. Proper decoupling is required.
GND	Power	System Ground.
MISO	Output	Host In Client Out. This pin serves as the SPI Data Output from the TPM.
MOSI	Input	Host Out Client In. This pin serves as the SPI Data Input to the TPM.
PIRQ#	Open Drain Output	SPI Interrupt Pin, active-low. This pin is used by the TPM to assert interrupts. If unused, it is recommended to tie this pin to ground directly or through a 4.7 kΩ resistor.
SPI_CLK	Clock Input	Input Clock to drive the SPI bus. It is recommended to assert this pin high for power savings when the TPM is not in use.
SPI_CS#	Input	SPI_CS# Chip Select, active-low. The TPM device will be selected when the chip select is asserted LOW.
SPI_RST#	Input	SPI Reset Pin, active-low. Pulsing this signal low resets the internal state of the TPM, and is equivalent to the removal/restoration of power to the device. The required minimum reset pulse width is 2 µs. On power-up, it is critical that the reset be kept active-low until the V_CC and SPI_CLK stabilize. To be compliant with TCG requirements, this pin needs to be tied to the system reset. TPM_Init is indicated by asserting this pin.

Notice: The SPI standard uses the terminology “Master” and “Slave”. The equivalent Microchip terminology used in this document is “Host” and “Client”, respectively.