UPDI UART

All transmission and reception of serial data on the UPDI is achieved using the UPDI frames presented in Figure 1. Communication is initiated from the debugger/programmer side, and every transmission must start with a SYNCH character upon which the UPDI can recover the transmission baud rate, and store this setting for the coming data. The baud rate set by the SYNCH character will be used for both reception and transmission for the instruction byte received after the SYNCH. See UPDI Instruction Set for details on when the next SYNCH character is expected in the instruction stream.

There is no writable baud rate register in the UPDI, so the baud rate sampled from the SYNCH character is used for data recovery by sampling the Start bit, and performing a majority vote on the middle samples.

The transmission baud rate of the PDI PHY is related to the selected UPDI clock, which can be adjusted by UPDI Clock Select (UPDICLKSEL) bit in UPDI.ASI_CTRLA. See Table 1 for recommended maximum and minimum baud rate settings. The receive and transmit baud rates are always the same within the accuracy of the auto-baud.

Table 1. Recommended UART Baud Rate Based on UPDICLKSEL Setting
UPDICLKSEL[1:0]	Max. Recommended Baud Rate	Min. Recommended Baud Rate
0x1 (16 MHz)	0.9 Mbps	0.300 kbps
0x2 (8 MHz)	450 kbps	0.150 kbps
0x3 (4 MHz) - Default	225 kbps	0.075 kbps

The UPDI Baud Rate Generator utilizes fractional baud counting to minimize the transmission error. With the fixed frame format used by the UPDI, the maximum and recommended receiver transmission error limits can be seen in the following table:

Table 2. Receiver Baud Rate Error
Data + Parity Bits	R_slow	R_fast	Max. Total Error [%]	Recommended Max. RX Error [%]
9	96.39	104.76	+4.76/-3.61	+1.5/-1.5