Control Register F Set
Use this register instead of a Read-Modify-Write (RMW) to set individual bits by
writing a ‘1
’ to its bit location.
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CMP2BV | CMP1BV | CMP0BV | PERBV | ||||
Access | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 |
Compare 2 Buffer Valid
See CMP0BV.
Compare 1 Buffer Valid
See CMP0BV.
Compare 0 Buffer Valid
The CMPnBV bits are set when a new value is written to the corresponding TCAn.CMPnBUF register. These bits are automatically cleared on an UPDATE condition.
Period Buffer Valid
This bit is set when a new value is written to the TCAn.PERBUF register. This bit is automatically cleared on an UPDATE condition.