Count
The TCBn.CNTL and TCBn.CNTH register pair represents the 16-bit value
TCBn.CNT. The low byte [7:0] (suffix L) is accessible at the
original offset. The high byte [15:8] (suffix H) can be accessed at offset +
0x01
.
CPU and UPDI write access has priority over internal updates of the register.
Bit15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
CNT[15:8] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CNT[7:0] | |||||||
AccessR/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Reset0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Count Value High
These bits hold the MSB of the 16-bit Counter register.
Count Value Low
These bits hold the LSB of the 16-bit Counter register.