Both megaAVR and AVR Dx families offer a comprehensive interrupt system, with a configurable interrupt vector table, but the architecture and features are different between families. The interrupt vectors and flags are not identical in both families, even if they are used by the same peripheral.
For the megaAVR devices, the Reset vector can be placed either at address 0x0000 or Boot Reset address, selectable using Boot Reset Fuse (BOOTRST), and Interrupt Vector Select (IVSEL) fuses. That allows the usage of different interrupt vector locations for the bootloader and the application, with the flexibility of commuting between them in software.
The interrupt vector table of the AVR Dx devices is always placed at address 0x0000 after Reset, even if the bootloader is used. That is possible because the bootloader section is placed at the beginning of the Flash area and not at the end, like for the megaAVR devices. The interrupt vector table is software re-mappable to the beginning of the application area using the IVSEL bit from the CPUINT.CTRLA register.
The interrupt vector table is always placed in the generated code, even if only a limited number of interrupts are used. To allow writing of compact code, the interrupt controller of the AVR Dx devices offers a selectable Compact Vector Table (CVT). This feature reduces the number of interrupt handlers and thereby frees up memory that can be used for the application code. When the CVT feature is used, all interrupts share the same interrupt vector number/Interrupt Service Routine (ISR).
Additionally to the CVT feature, the AVR Dx interrupt controller offers a non-maskable interrupt for critical functions, one selectable high-priority interrupt, and an optional round robin scheduling scheme for normal priority interrupts.