Virtual Ports

The often-used PORT registers are also mapped into bit-accessible I/O memory space. The access to the Virtual PORT registers has the same outcome as the access to the regular registers, but it allows for memory-specific instructions, such as bit manipulation instructions. These instructions cannot be used in the extended I/O Register space where the regular PORT registers reside.

Regular Port Registers Virtual Port Registers Description
PORTx.DIR VPORTx.DIR Data direction - controls the data direction (output driver)
PORTx.OUT VPORTx.OUT Data Out - controls the output driver level for each PORTx pin
PORTx.IN VPORTx.IN Data In - shows the state of the PORTx pin
PORTx.INTFLAGS VPORTx.INTFLAGS Pin Interrupt flag - is set when the change or state of the PORTx pin matches the pin’s Input/Sense Configuration (ISC) in PORTx.PINnCTRL