Follow these rules when assigning a pin for the PF_IOD_CDR interface:
- One differential input IOA, one differential output IOA.
- Four IOD associated with IOA, one floating IOD.
- The floating IOD is placed in the N side IOD site with the function DQS.
- N side IOA with the function DQS cannot be used.
- One PF_IOD_CDR_CCC can be shared with multiple instances of PF_IOD_CDR as long as they are at the same data rate and placed in the same group of lanes.
- PF_IOD_CDR_CCC uses one PLL, one DLL and one LANECTRL.
- Transmit and receive IOA must be placed in the same lane.
- IOA from two different interfaces (TX/RX/DDR/QDR/OCTAL/CDR) cannot be placed in the same I/O lane.