The following illustration shows the input register.
The following table lists the input register pins and descriptions.
Ports | Types | Descriptions |
---|---|---|
CLK | Input | Clock input |
D | Input | Data input |
Q | Output | Data output |
EN | Input | Clock enable (active high) |
SL | Input | Synchronous load (active high) |
AL_B | Input | Active low asynchronous load (active low) |
LAT | Input | Latch enable (active high) |
SD_B | Input | Synchronous data |
AD_B | Input | Asynchronous data (active low) |