I/O Gearing

I/O gearing handles serial-to-parallel and parallel-to-serial conversion of multiple FPGA fabric signals to and from a single device I/O based on user clock settings, as shown in the following illustration. The gearbox either deserializes and transfers input data to a lower core clock speed, or transfers lower-speed data from the fabric to the high-speed output clock domain, and serializes it in the process. Libero SoC automatically configures these gearboxes based on the application settings. Generic IOD interfaces provide a complete solution from the I/O pins to the fabric. Generic IOD is supported by construction using Libero SoC configurators and limited to the defined list of use cases. See Generic I/O Interfaces for available support.

The following illustration shows the I/O gearing example, where high-speed serial data is passed from I/O to fabric via four signals at lower speed.

Figure 1. I/O Digital